K-Map generator

The solver builds the Karnaugh map for 2 to 6 variables, finds the prime implicant groups, and reads off the minimized SOP and POS expressions. You can also view the truth table, get the result as Verilog or VHDL, and draw the gate-level circuit.

• Supports 2–6 variables. Enter them comma-separated (e.g. A, B, C, D). Variable names and operator words ignore case, so a and b matches variables A, B.
• Operators are flexible. You can mix symbols and words freely: A * B + C' and A and B or not C are both valid, even A * B or !C.
• Multiple symbols per gate: NOT is ' ~ !, AND is . * &, OR is + |, XOR is ^, XNOR is @, NAND is %, NOR is #.
• Implicit AND: names written next to each other are ANDed, so AB + A'C and (A + B)(C + D) work. Use explicit operators if a variable name is longer than one letter and could be read as two.
• Precedence: NOT, then AND and NAND, then XOR and XNOR, then OR and NOR. Use parentheses to override.
• Leave the expression blank and click Generate to enter manual mode, then click cells directly to set 1, 0, or X.
• Switch to Minterms/Maxterms mode to enter indices directly (e.g. 1, 3, 5, 7).
• Click any cell in the K-map to toggle between 0, 1, and X (don't-care). This works in all modes. Click Revert to input or re-click Generate to restore the original values.
• Toggle POS, Verilog, VHDL, and Steps with the buttons below Generate.
• Steps has three views. K-map shows how each group is read off the map. Algebra rewrites your expression into the minimized SOP one Boolean law at a time, naming each law it uses. Quine-McCluskey shows the tabular method: combining columns, the prime implicant chart and the chosen cover.
• Check my answer tells you whether your own SOP or POS equals the map, outlines the cells it gets wrong, and says whether it is minimal.
• The map updates as you type, and the address bar always links to what is on screen. Copy link copies it to share.
• XOR/XNOR patterns are auto-detected when the SOP can be simplified using XOR gates.