Write Policies
Write-through vs write-back: when and how cached writes reach main memory.
Problem
When the CPU writes data that's in the cache, the cache copy is updated instantly. But main memory still has the old value. When should the cache send the update to memory: immediately, or later?
How it works
Write-through: Every write updates both the cache and main memory at the same time. The cache and memory always agree. Simple, but every store instruction generates a memory bus transaction, even if the same address is written repeatedly. A write buffer (small FIFO queue) helps: writes are posted to the buffer and drained to memory in the background, so the CPU doesn't stall on every store. If the buffer fills, the CPU must wait.
Write-back: Writes update only the cache. The cache line is marked dirty (a single bit per line). Memory is not touched until the dirty line is evicted: only then is the data written back. If the line is written 100 times before eviction, only 1 memory write occurs. This drastically reduces memory traffic, but adds complexity: on eviction, hardware must check the dirty bit and conditionally write back before loading the new line.
Write-allocate vs no-write-allocate: What happens on a write miss (the address isn't cached)? Write-allocate fetches the block into the cache first, then writes to it: betting on future accesses to the same block (spatial/temporal locality). No-write-allocate writes directly to memory without caching the block. Write-back caches almost always use write-allocate. Write-through caches can go either way.
Common pairings:
• Write-back + write-allocate: most L1/L2 caches in modern CPUs. Minimizes memory traffic by absorbing repeated writes and caching on miss.
• Write-through + no-write-allocate: simpler, used in some embedded or GPU caches. Every write goes to memory; write misses skip the cache entirely.
Write-back: Writes update only the cache. The cache line is marked dirty (a single bit per line). Memory is not touched until the dirty line is evicted: only then is the data written back. If the line is written 100 times before eviction, only 1 memory write occurs. This drastically reduces memory traffic, but adds complexity: on eviction, hardware must check the dirty bit and conditionally write back before loading the new line.
Write-allocate vs no-write-allocate: What happens on a write miss (the address isn't cached)? Write-allocate fetches the block into the cache first, then writes to it: betting on future accesses to the same block (spatial/temporal locality). No-write-allocate writes directly to memory without caching the block. Write-back caches almost always use write-allocate. Write-through caches can go either way.
Common pairings:
• Write-back + write-allocate: most L1/L2 caches in modern CPUs. Minimizes memory traffic by absorbing repeated writes and caching on miss.
• Write-through + no-write-allocate: simpler, used in some embedded or GPU caches. Every write goes to memory; write misses skip the cache entirely.
Key insightWrite-back trades a 1-bit cost per cache line (the dirty bit) for a massive reduction in memory bus traffic. If a loop writes to the same array element 1000 times, write-through generates 1000 memory writes; write-back generates 1. This is why virtually every modern CPU cache uses write-back.