p14m

Market Data Infrastructure

How market data travels from exchanges to trading firms: UDP feeds, co-location, and FPGA network cards.

Problem

The order book you just interacted with gets its data from somewhere. In the real world, how does market data travel from an exchange to the trading firm's matching engine: and why does every microsecond on that path matter?

How it works

The data feed: Exchanges publish market data (every new order, cancel, and trade) as a stream of messages using protocols like ITCH (Nasdaq), PITCH (Cboe), or OPRA (options). These are compact binary formats: an ITCH message is typically 20–50 bytes: designed to be parsed fast, not human-readable.

Why UDP, not TCP: Market data feeds use multicast UDP rather than TCP. TCP guarantees delivery by retransmitting lost packets, but retransmission adds latency and stalls the stream for everyone. UDP is fire-and-forget: the exchange blasts packets to all subscribers simultaneously. If a packet is lost, firms detect the gap via sequence numbers and request a retransmit on a separate recovery channel: but the main feed keeps flowing at wire speed. For data where being 1µs late is worse than occasionally missing a message, UDP wins.

Network hops: Each device a packet passes through: switch, router, NIC: is a hop, and each hop adds latency (typically 100ns–1µs per switch). Fewer hops = faster. This is why firms obsess over network topology.

Co-location: Trading firms rent rack space inside the exchange's data center, often in the same room as the matching engine. This eliminates wide-area network latency entirely. The physical cable length between the firm's server and the exchange's switch might be 10–50 meters: the speed of light in fiber is ~5ns/meter, so even cable length matters at this scale. Exchanges sell equal-length cables to ensure fairness.

FPGA network cards (Smart NICs): A normal server receives a UDP packet through the OS kernel: interrupt handling, memory copies, context switches: adding microseconds of overhead. FPGA-based NICs bypass the CPU entirely: the FPGA parses the incoming Ethernet frame, extracts the market data message, and updates the order book representation in hardware, all within the same clock cycles the packet arrives on the wire. The result is single-digit microsecond or sub-microsecond tick-to-trade latency: from seeing a market data update to having a response order on the wire.
Key insightThe data feeding the order book you interacted with arrives through this exact pipeline in the real world: exchange → multicast UDP → co-located switch → FPGA NIC → hardware order book → trading decision → order out. Every component in this chain is optimized to shave microseconds, because in competitive markets, the fastest firm to react to new information captures the opportunity.