Shift-and-Add
Sequential multiplication using one adder, reused n times.
Problem
How do you multiply two n-bit numbers with minimal hardware?
How it works
Processes one multiplier bit per clock cycle. If the bit is 1, the shifted multiplicand is added to a running accumulator; if 0, just shift. After n cycles, the accumulator holds the 2n-bit product.
Key insightOne n-bit adder, reused n times: trades time for silicon area.
Tradeoffs
- Area
- 2n FA-eq (smallest)
- Delay
- 2n² gate delays (slowest)
- Best when: Area is critical and latency is acceptable.