Two's Complement
The standard way hardware represents negative integers.
Problem
How does hardware represent negative numbers using only 0s and 1s?
How it works
In an n-bit two's complement system, the MSB has a negative weight: −(2n−1) instead of +(2n−1). The remaining bits have normal positive weights.
For example, in 8-bit:
To negate a number: flip all bits, then add 1. So −5 = NOT(00000101) + 1 = 11111010 + 1 = 11111011.
Range: n bits represent −(2n−1) to +(2n−1 − 1). For 8-bit: −128 to +127.
The key advantage: addition works identically for signed and unsigned numbers: the same adder hardware handles both. Subtraction is just addition of the negated value.
For example, in 8-bit:
11111011 = −128 + 64 + 32 + 16 + 8 + 0 + 2 + 1 = −5.To negate a number: flip all bits, then add 1. So −5 = NOT(00000101) + 1 = 11111010 + 1 = 11111011.
Range: n bits represent −(2n−1) to +(2n−1 − 1). For 8-bit: −128 to +127.
The key advantage: addition works identically for signed and unsigned numbers: the same adder hardware handles both. Subtraction is just addition of the negated value.
Key insightTwo's complement makes the adder "sign-blind": one circuit handles both signed and unsigned addition. This is why Booth's algorithm gets signed multiplication "for free."