Endianness
Big-endian vs little-endian: how multi-byte values map to memory addresses.
Problem
A 32-bit integer like
0x44332211 occupies 4 bytes. When stored at memory address 0x00, which byte goes where? Different processors answer this differently.How it works
Big-endian: the most significant byte (MSB) is stored at the lowest address.
Reads left-to-right, same as how we write numbers. Used by network protocols (TCP/IP), SPARC, and older Motorola/PowerPC.
Little-endian: the least significant byte (LSB) is stored at the lowest address.
Looks "backwards" but has a hardware advantage: the address of the value doesn't change regardless of size. The byte at address 0 is always the least significant, whether you're reading 1, 2, or 4 bytes. This simplifies type casting in hardware. Used by x86, ARM (default), and RISC-V (default).
Network byte order: TCP/IP standardized big-endian. When an x86 machine sends a 16-bit port number, it must byte-swap it first (
Bi-endian: ARM and RISC-V can operate in either mode, configured at boot. In practice, little-endian dominates because the x86 ecosystem established it as the default for most software.
0x44332211 at address 0x00:Addr 0x00: 0x44 │ 0x01: 0x33 │ 0x02: 0x22 │ 0x03: 0x11Reads left-to-right, same as how we write numbers. Used by network protocols (TCP/IP), SPARC, and older Motorola/PowerPC.
Little-endian: the least significant byte (LSB) is stored at the lowest address.
0x44332211 at address 0x00:Addr 0x00: 0x11 │ 0x01: 0x22 │ 0x02: 0x33 │ 0x03: 0x44Looks "backwards" but has a hardware advantage: the address of the value doesn't change regardless of size. The byte at address 0 is always the least significant, whether you're reading 1, 2, or 4 bytes. This simplifies type casting in hardware. Used by x86, ARM (default), and RISC-V (default).
Network byte order: TCP/IP standardized big-endian. When an x86 machine sends a 16-bit port number, it must byte-swap it first (
htons() in C). The receiver byte-swaps it back. This is a constant source of bugs when the conversion is forgotten.Bi-endian: ARM and RISC-V can operate in either mode, configured at boot. In practice, little-endian dominates because the x86 ecosystem established it as the default for most software.
Key insightEndianness only matters when you view memory as individual bytes. Inside the CPU, a 32-bit register is just a 32-bit value: there's no byte order. The issue arises at the boundary: storing to memory, sending over a network, or reading a binary file written by a different architecture.