IEEE 754 Floating Point
How hardware represents real numbers with wide dynamic range.
Problem
Fixed-point has limited range. How does hardware represent very large and very small numbers with the same format?
How it works
IEEE 754 single precision (32 bits) splits the bits into three fields:
Sign (1 bit): 0 = positive, 1 = negative.
Exponent (8 bits): biased by 127. Stored value E, actual exponent = E − 127. Range: −126 to +127.
Mantissa (23 bits): the fractional part after an implied leading 1. The actual significand is 1.mantissa (24 bits of precision).
Value = (−1)sign × 2(E−127) × 1.mantissa
Special values:
• E=0, mantissa=0 → ±0 (positive or negative zero)
• E=0, mantissa≠0 → denormalized (subnormal): value = (−1)s × 2−126 × 0.mantissa
• E=255, mantissa=0 → ±Infinity
• E=255, mantissa≠0 → NaN (Not a Number)
Double precision (64 bits): 1 sign + 11 exponent (bias 1023) + 52 mantissa.
Sign (1 bit): 0 = positive, 1 = negative.
Exponent (8 bits): biased by 127. Stored value E, actual exponent = E − 127. Range: −126 to +127.
Mantissa (23 bits): the fractional part after an implied leading 1. The actual significand is 1.mantissa (24 bits of precision).
Value = (−1)sign × 2(E−127) × 1.mantissa
Special values:
• E=0, mantissa=0 → ±0 (positive or negative zero)
• E=0, mantissa≠0 → denormalized (subnormal): value = (−1)s × 2−126 × 0.mantissa
• E=255, mantissa=0 → ±Infinity
• E=255, mantissa≠0 → NaN (Not a Number)
Double precision (64 bits): 1 sign + 11 exponent (bias 1023) + 52 mantissa.
Key insightThe exponent gives huge dynamic range (~10±38 for single, ~10±308 for double) while the mantissa gives ~7 or ~16 decimal digits of precision. The tradeoff vs fixed-point: much more complex hardware (FPU) for much more flexible range.